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TPIC6259 POWER LOGIC 8-BIT ADDRESSABLE LATCH
SLIS009A – APRIL 1992 – REVISED SEPTEMBER 1995
• Low rDS(on) . . . 1.3 Ω Typical • Avalanche Energy . . . 75 mJ
DW OR N PACKAGE (TOP VIEW)
• Eight Power DMOS Transistor Outputs of
250-mA Continuous Current
• 1.5-A Pulsed Current Per Output • Output Clamp Voltage at 45 V • Four Distinct Function Modes • Low Power Consumption
PGND 1 VCC 2 S0 3
DRAIN0 4 DRAIN1 5 DRAIN2 6
20 PGND 19 CLR 18 D 17 DRAIN7 16 DRAIN6 15 DRAIN5
description
DRAIN3 7 S1 8
14 DRAIN4 13 G
This power logic 8-bit addressable latch controls open-drain DMOS transistor outputs and is
LGND 9 PGND 10
12 S2 11 PGND
designed for general-purpose storage applications in digital systems.