SLVSAV3C – APRIL 2011 – REVISED MAY 2012
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
-40°C to +85°
-2.2V ~ -6.2V
-2.2V ~ -5.2V
10-Pin 3x3 QFN
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
PVIN, SWP, OUTP, CTRL, VL
Operating junction temperature range, TJ
Operating ambient temperature range, TA
Storage temperature range, Tstg
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND pin
θJA Junction-to-ambient thermal resistance
θJB Junction-to-board thermal resistance
ψJT Junction-to-top characterization parameter
ψJB Junction-to-board characterization parameter
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953
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