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TPS737 - 1-A Low-Dropout Regulator

General Description

The TPS737 linear low-dropout (LDO) voltage regulator uses an NMOS pass transistor in a voltagefollower configuration.

This topology is relatively insensitive to the output capacitor value and ESR, allowing for a wide variety of load configurations.

Key Features

  • Stable with 1-μF or larger ceramic output capacitor.
  • Input voltage range: 2.2 V to 5.5 V.
  • Ultra-low dropout voltage.
  • Legacy silicon: 130 mV typical at 1 A.
  • New silicon, M3 suffix: 122 mV typical at 1 A.
  • Excellent load transient response.
  • even with only 1-μF output capacitor.
  • NMOS topology delivers low reverse leakage current.
  • Initial accuracy: 1%.
  • Overall accuracy over line, load, and temperature.
  • L.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TPS737 SBVS067T – JANUARY 2006 – REVISED DECEMBER 2023 TPS737 1-A Low-Dropout Regulator With Reverse Current Protection 1 Features • Stable with 1-μF or larger ceramic output capacitor • Input voltage range: 2.2 V to 5.5 V • Ultra-low dropout voltage – Legacy silicon: 130 mV typical at 1 A – New silicon, M3 suffix: 122 mV typical at 1 A • Excellent load transient response—even with only 1-μF output capacitor • NMOS topology delivers low reverse leakage current • Initial accuracy: 1% • Overall accuracy over line, load, and temperature – Legacy silicon: 3% – New silicon, M3 suffix: 1.5% • Less than 20 nA typical IQ in shutdown mode • Thermal shutdown and current limit for fault protection • Available in multiple output voltage versions: – Adjustable output: 1.20 V to 5.