TPS737 Overview
The TPS737 linear low-dropout (LDO) voltage regulator uses an NMOS pass transistor in a voltagefollower configuration. This topology is relatively insensitive to the output capacitor value and ESR, allowing for a wide variety of load configurations. Load transient response is excellent, even with a small 1-μF ceramic output capacitor.
TPS737 Key Features
- Stable with 1-μF or larger ceramic output capacitor
- Input voltage range: 2.2 V to 5.5 V
- Ultra-low dropout voltage
- Legacy silicon: 130 mV typical at 1 A
- New silicon, M3 suffix: 122 mV typical at 1 A
- Excellent load transient response-even with only 1-μF output capacitor
- NMOS topology delivers low reverse leakage current
- Initial accuracy: 1%
- Overall accuracy over line, load, and temperature
- Legacy silicon: 3%
TPS737 Applications
- Point-of-load regulation for DSPs, FPGAs, ASICs, and microprocessors
- Post-regulation for switching supplies