TPS76833QPWPR Datasheet | Texas Instruments

URES - Input Voltage Range: 2.7 V to 10 V - Low-Dropout Voltage: 230 m V typical at 1 A (TPS76850) - 2% Tolerance Over Specified Conditions for Fixed-Output Versions - Open Drain Power Good (See TPS767xx for Power-On Reset With 200-ms Delay Option) - Ultralow 85 µA Typical Quiescent Current - Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V Fixed Output and Adjustable (1.2 V to 5.5 V) Versions - Fast Transient Response - Thermal Shutdown Protection - SOIC-8 (D) and TSSOP-20 (PWP) Package D PACKAGE (Top View) GND 1 EN 2 IN 3 IN 4 8 PG 7 FB/NC 6 OUT 5 OUT PWP PACKAGE (Top View) GND/HSINK 1 GND/HSINK 2 GND 3 NC 4 EN 5 IN 6 IN 7 NC 8 GND/HSINK 9 GND/HSINK 10 20 GND/HSINK 19 GND/HSINK 18 NC 17 NC 16 PG 15 FB/NC 14 OUT 13 OUT 12 GND/HSINK 11 GND/HSINK DESCRIPTION This device is designed to have a fast transient response and be stable with 10 µF capacitors. This bination provides high performance at a reasonable cost. Since the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 m V at an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 m A to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also Features a shutdown mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C. Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery indicator. VI 0.1 µF TPS768xx 6 IN 7...