SCDS185C – JANUARY 2005 – REVISED SEPTEMBER 2012
Table 2. ORDERING INFORMATION
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-
SOT (SOT-23) – DBV
Tape and reel
Tape and reel
ORDERABLE PART NUMBER
SOT (SC-70) – DCK
Tape and reel TS5A1066DCKR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
NO TO COM,
COM TO NO
Absolute Minimum and Maximum Rating(1) (2)
over operating free-air temperature range (unless otherwise noted)
Supply voltage range(3)
Analog voltage range(3) (4) (5)
Analog port diode current
On-state switch current
Digital input voltage range(3) (4)
Digital input clamp current
Continuous current through each V+ or GND
θJA Package thermal impedance(6)
VNO, VCOM < 0 or VNO, VCOM > V+
VNO, VCOM = 0 to V+
VI < 0
V+ + 0.5
Tstg Storage temperature range
–65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
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