900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf






etcTI

UCD90240 Datasheet Preview

UCD90240 Datasheet

24-Rail PMBus Power Sequencer and System Manager

No Preview Available !

Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
UCD90240
SLVSCW0 – FEBRUARY 2015
UCD90240 24-Rail PMBus Power Sequencer and System Manager
1 Features
1 Sequence, Monitor and Margin 24 Voltage Rails
with a 9-mm × 9-mm Small Footprint
• Monitor and Respond to User-Defined Faults
Including OV, UV, OC, UC, Temperature, Time-
out, and GPI-Triggered Faults
• Flexible Sequence-on/off Dependencies, Delay
Time, Boolean Logic, and GPIO Configuration to
Support Complex Sequencing Applications
• High-accuracy Closed-loop Margining
• Active Trim Function Improves Rail Output
Voltage Accuracy
• Advanced Nonvolatile Event Logging to Assist
System Debugging
– Single-Event Fault Log (100 Entries)
– Peak Value Log
– Black Box Fault Log to Save Status of all Rails
and I/O Pins at the First Fault
• Easily Cascade Up to 4 Power Sequencers and
Take Coordinated Fault Responses
• Easy-to-Use Fusion GUIs Eliminate Coding Efforts
– Online and Offline System Level Design
– Online Monitoring and Debugging
– Manufacturing GUI Optimized for
Manufacturers
• Programmable Watchdog Timer and System
Reset
• Pin-Selected Rail State
• PMBus 1.2 Compliant
2 Applications
• Industrial and ATE
• Telecom and Networking Equipment
• Servers and Storage Systems
• Systems Requiring Sequencing and Monitoring of
Multiple Power Rails
3 Description
The UCD90240 is a 24-rail PMBus addressable
power sequencer and system manager in a compact
9-mm × 9-mm BGA package.
1
The device provides 24 analog monitor (MON) pins to
monitor power-supply voltage, current, or temperature
with two 12-bit ADC engines, 24 dedicated enable
(EN) pins to control power rail on/off, 24 dedicated
margin pins for closed-loop margining, 12 Logic GPO
(LGPO) pins to support flexible Boolean logic and
state machine functions, and 24 GPIO pins which can
be configured as GPI, GPO, System Reset,
cascading fault pins, and Watchdog I/O, and so forth.
The 24 EN pins and the 12 LGPO pins can be
configured to be active driven or open-drain outputs.
Nonvolatile Event Logging preserves fault events
after power dropout. Black Box Fault Log feature
preserves the status of all rails and I/O pins when the
first fault occurs.
The cascading feature offers convenient ways to
manage up to 96 voltage rails through one
SYNC_CLK pin connection. The Fault Pin feature
coordinates among cascaded devices to take
synchronized fault responses.
The Pin-Selected Rail States feature uses up to three
GPIs to control up to eight user-defined power states.
These states can implement system low-power
modes as outlined in the Advanced Configuration and
Power Interface (ACPI) specification.
The TI Fusion Digital Power™ designer software is
an intuitive PC-based graphical user interface (GUI)
that can configure, store, and monitor all system
operating parameters.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UCD90240
BGA (157)
9.00 mm × 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified System Diagram
12V
I12V
INA196
12V OUT
3.3V OUT
1.8V OUT
0.8V OUT
I12V
TEMP 0.8V
TEMP 12V
WDI from main processor
WDO
System Reset
GPI Fault
POWER_GOOD
12V OUT
TEMP 12V TEMP
IC
3.3V Supply
VREF (Optional)
V33D V33A VREFA+ VREFA-
MON
EN
MON
MON
EN
MON
MON
MON
MON
MON UCD90240
EN
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
LGPO
LGPO
MARGIN
GATE
Hot Swap Control
EN
VIN
EN
VOUT
DC-DC 1
VFB
3.3V OUT
EN
VIN
VOUT
1.8V OUT
LDO 1
VIN
EN
VOUT
DC-DC 2
VFB
TEMP TEMP 0.8V
IC
0.8V OUT
PMBus/I2C
JTAG
3.3V
GPIO
SYNC_CLK
Fault Pin
UCD90240 (Cascaded)
GPIO
SYNC_CLK
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

UCD90240 Datasheet Preview

UCD90240 Datasheet

24-Rail PMBus Power Sequencer and System Manager

No Preview Available !

UCD90240
SLVSCW0 – FEBRUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 8
6.1 Absolute Maximum Ratings ...................................... 8
6.2 ESD Ratings ............................................................ 8
6.3 Recommended Operating Conditions....................... 8
6.4 Thermal Information .................................................. 9
6.5 Electrical Characteristics .......................................... 9
6.6 Nonvolatile Memory Characteristics ...................... 10
6.7 I2C/PMBUS Timing Requirements ......................... 11
7 Detailed Description ............................................ 12
7.1 Device Overview ..................................................... 12
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 13
8 Application and Implementation ........................ 40
8.1 Application Information............................................ 40
8.2 Typical Application .................................................. 40
9 Power Supply Recommendations...................... 43
10 Layout................................................................... 43
10.1 Layout Guidelines ................................................. 43
10.2 Layout Example .................................................... 43
11 Device and Documentation Support ................. 45
11.1 Trademarks ........................................................... 45
11.2 Electrostatic Discharge Caution ............................ 45
11.3 Glossary ................................................................ 45
12 Mechanical, Packaging, and Orderable
Information ........................................................... 45
4 Revision History
DATE
February 2015
REVISION
*
NOTES
Initial release.
2
Submit Documentation Feedback
Product Folder Links: UCD90240
Copyright © 2015, Texas Instruments Incorporated


Part Number UCD90240
Description 24-Rail PMBus Power Sequencer and System Manager
Maker etcTI
PDF Download

UCD90240 Datasheet PDF






Similar Datasheet

1 UCD90240 24-Rail PMBus Power Sequencer and System Manager
etcTI





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z



Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy