File Size : 419.81KB ·
4 hits
D Power Monitoring and Switching for Non-Volatile Control of SRAMs D Input Decoder Allows Control of 1 or 2 Banks of SRAM D Write-Protect Control D 3-V Primary Cell Input D 3.3-V Operation D Reset Output for System Power-On Reset D Less than 20-ns Chip Enable Propagation Delay D Small 16-Lead TSSOP .
