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74ABT74PW Datasheet Preview

74ABT74PW Datasheet

Dual D-type flip-flop

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74ABT74
Dual D-type flip-flop with set and reset; positive edge-trigger
Rev. 3 — 12 October 2020
Product data sheet
1. General description
The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP),
set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that
meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored
in the flip-flop and appear at the Q output. This device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging
backflow current through the device when it is powered down.
2. Features and benefits
Supply voltage range from 4.5 V to 5.5 V
BiCMOS high speed and output drive
Direct interface with TTL levels
Power-up 3-state
IOFF circuitry provides partial Power-down mode operation
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74ABT74D
-40 °C to +85 °C SO14
74ABT74PW -40 °C to +85 °C TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1




nexperia

74ABT74PW Datasheet Preview

74ABT74PW Datasheet

Dual D-type flip-flop

No Preview Available !

Nexperia
4. Functional diagram
4 10
1SD 2SD
SD
2
12
1D
2D
D
1Q 5
Q 2Q 9
3
11
1CP
2CP
CP
FF
1Q 6
Q
RD
2Q
8
1RD 2RD
1 13 mna418
Fig. 1. Logic symbol
nSD
74ABT74
Dual D-type flip-flop with set and reset; positive edge-trigger
4
S
5
3
C1
2
1D
6
1
R
10
S
9
11
C1
12
1D
8
13
R
mna419
Fig. 2. IEC logic symbol
nRD
Q
nCP
Q
nD
Fig. 3. Logic diagram for one flip-flop
5. Pinning information
5.1. Pinning
74ABT74
1RD 1
1D 2
14 VCC
13 2RD
1CP 3
12 2D
1SD 4
11 2CP
1Q 5
10 2SD
1Q 6
9 2Q
GND 7
8 2Q
aaa-024201
Fig. 4. Pin configuration SOT108-1 (SO14)
aaa-024200
74ABT74
1RD 1
1D 2
1CP 3
1SD 4
1Q 5
1Q 6
GND 7
14 VCC
13 2RD
12 2D
11 2CP
10 2SD
9 2Q
8 2Q
aaa-024202
Fig. 5. Pin configuration SOT402-1 (TSSOP14)
74ABT74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 October 2020
© Nexperia B.V. 2020. All rights reserved
2 / 13


Part Number 74ABT74PW
Description Dual D-type flip-flop
Maker nexperia
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