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74AHC08PW Datasheet Preview

74AHC08PW Datasheet

Quad 2-input AND gate

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74AHC08; 74AHCT08
Quad 2-input AND gate
Rev. 4 — 26 May 2020
Product data sheet
1. General description
The 74AHC08; 74AHCT08 are quad 2-input AND gates. Inputs are overvoltage tolerant. This
feature allows the use of these devices as translators in mixed voltage environments.
2. Features and benefits
Wide supply voltage range from 2.0 V to 5.5 V
Input levels:
For 74AHC08: CMOS level
For 74AHCT08: TTL level
Balanced propagation delays
All inputs have a Schmitt-trigger action
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
ESD protection:
HBM EIA/JESD22-A114E exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101C exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC08D
74AHCT08D
-40 °C to +125 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHC08PW
74AHCT08PW
-40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1
body width 4.4 mm
74AHC08BQ
74AHCT08BQ
-40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm
SOT762-1




nexperia

74AHC08PW Datasheet Preview

74AHC08PW Datasheet

Quad 2-input AND gate

No Preview Available !

Nexperia
4. Functional diagram
1
&
3
2
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
1Y 3
2Y 6
3Y 8
4Y 11
mna222
Fig. 1. Logic symbol
4
&
6
5
9
&
8
10
12
&
11
13
mna223
Fig. 2. IEC logic symbol
5. Pinning information
74AHC08; 74AHCT08
Quad 2-input AND gate
A
Y
B
mna221
Fig. 3. Logic diagram (one gate)
5.1. Pinning
74AHC08
74AHCT08
1A 1
14 VCC
1B 2
13 4B
1Y 3
12 4A
2A 4
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
aaa-031693
Fig. 4. Pin configuration SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
5.2. Pin description
Table 2. Pin description
Symbol
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
GND
VCC
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
74AHC08
74AHCT08
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND(1)
13 4B
12 4A
11 4Y
10 3B
9 3A
aaa-031694
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND
Fig. 5. Pin configuration SOT762-1 (DHVQFN14)
Description
data inputs
data inputs
data outputs
ground (0 V)
supply voltage
74AHC_AHCT08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 May 2020
© Nexperia B.V. 2020. All rights reserved
2 / 12


Part Number 74AHC08PW
Description Quad 2-input AND gate
Maker nexperia
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74AHC08PW Datasheet PDF






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