74AHC157D Datasheet - nexperia

Quad 2-input multiplexer

74AHC157D Features

* Balanced propagation delays

* All inputs have a Schmitt-trigger action

* Inputs accepts voltages higher than VCC

* Multiple input enable for easy expansion

* Ideal for memory chip select decoding

* For 74AHC157 only: operates with CMOS input levels

74AHC157D General Description

The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT157 are quad 2-input multiplexer which select 4 bits of data from two sources under the control of a common dat.

74AHC157D Datasheet (260.18 KB)