74AHC2G125 Datasheet | Nexperia

description The 74AHC2G125 and 74AHCT2G125 are high-speed Si-gate CMOS devices. They provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (n OE). A HIGH at n OE causes the output to assume a high-impedance OFF-state. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits - Symmetrical output impedance - High noise immunity - Low power dissipation - Balanced propagation delays - Multiple package options - ESD protection: - HBM JESD22-A114E: exceeds 2000 V - MM JESD22-A115-A: exceeds 200 V - CDM JESD22-C101C: exceeds 1000 V - Specified from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74AHC2G125DP 74AHCT2G125DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm 74AHC2G125DC 74AHCT2G125DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm Version SOT505-2 SOT765-1 4. Marking Table 2. Marking codes Type number 74AHC2G125DP 74AHCT2G125DP 74AHC2G125DC 74AHCT2G125DC Marking[1] A25 C25 A25 C25 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. Nexperia 5. Functional diagram 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 2 1A 1Y 6 1 1OE 5...