Datasheet Details
| Part number | 74AHC30-Q100 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 230.40 KB |
| Description | 8-input NAND gate |
| Datasheet |
 74AHC30-Q100 Datasheet
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General Description
The 74AHC30-Q100; 74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1).
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
- Balanced propagation delays.
- All inputs have Schmitt-trigger actions.
- Inputs accept voltages higher than VCC.
- Input levels:.
- For 74AHC30-Q100: CMOS level.
- For 74AHCT30-Q100: TTL level.
- ESD protection:.
- MIL-STD-883, method 3015 exceeds 2000 V.
- HBM JESD22-A114F exceeds.