74AHC374D flip-flop equivalent, octal d-type flip-flop.
I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Common 3-state output enable input I Input levels:
N Fo.
A clock input (CP) and an output enable input (OE) are common to all flip-flops.
The eight flip-flops will store the state .
The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separat.
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