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74AHCT04PW - Hex Inverter

Download the 74AHCT04PW datasheet PDF. This datasheet also covers the 74AHC04 variant, as both devices belong to the same hex inverter family and are provided as variant models within a single manufacturer datasheet.

Description

The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

7-A.

Features

  • Balanced propagation delays.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • For 74AHC04: CMOS level.
  • For 74AHCT04: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type numb.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74AHC04-nexperia.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AHC04; 74AHCT04 Hex inverter Rev. 7 — 10 September 2020 Product data sheet 1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits • Balanced propagation delays • Inputs accept voltages higher than VCC • Input levels: • For 74AHC04: CMOS level • For 74AHCT04: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101C exceeds 1000 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1.
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