74AHCT138D
Overview
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.
- Balanced propagation delays
- All inputs have Schmitt-trigger action
- Demultiplexing capability
- Multiple input enable for easy expansion
- Ideal for memory chip select decoding
- Inputs accepts voltages higher than VCC
- For 74AHC138 only: operates with CMOS input levels
- For 74AHCT138 only: operates with TTL input levels
- ESD protection:
- HBM JESD22-A114E exceeds 2000 V
