74AHCT139PW decoder/demultiplexer equivalent, dual 2-to-4 line decoder/demultiplexer.
I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels:
N For 74AHC139: CMOS level N For 74AHCT13.
The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demulti.
Image gallery
Download