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74AHCT139PW Datasheet Dual 2-to-4 line decoder/demultiplexer

Manufacturer: Nexperia

Download the 74AHCT139PW datasheet PDF. This datasheet also includes the 74AHC139 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (74AHC139-nexperia.pdf) that lists specifications for multiple related part numbers.

General Description

The 74AHC139;

74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

Overview

74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Rev.

02 — 9 May 2008 Product data sheet 1.

Key Features

  • I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N For 74AHC139: CMOS level N For 74AHCT139: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V N CDM EIA/JESD22-C101C exceeds 1000 V I Multiple package options I Specified from.
  • 40 °C to +85 °C and from.
  • 40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Tempera.

📁 Similar Datasheet

Brand Logo Part Number Description Manufacturer
NXP Logo 74AHCT139 Dual 2-to-4 line decoder/demultiplexer NXP

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