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74AHCT1G125GM Datasheet Preview

74AHCT1G125GM Datasheet

Bus buffer/line driver

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74AHC1G125; 74AHCT1G125
Bus buffer/line driver; 3-state
Rev. 11 — 13 October 2020
Product data sheet
1. General description
The 74AHC1G125/74AHCT1G125 is a single buffer/line driver with 3-state output. Inputs are
overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage
environments.
2. Features and benefits
Wide supply voltage range from 2.0 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
Symmetrical output impedance
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Balanced propagation delays
Multiple package options
Input levels:
For 74AHC1G125: CMOS level
For 74AHCT1G125: TTL level
ESD protection:
HBM JESD22-A114F: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101E: exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74AHC1G125GW
-40 °C to +125 °C TSSOP5
74AHCT1G125GW
74AHC1G125GV
-40 °C to +125 °C SC-74A
74AHCT1G125GV
74AHC1G125GM
-40 °C to +125 °C XSON6
74AHCT1G125GM
74AHCT1G125GF -40 °C to +125 °C XSON6
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
Version
SOT353-1
plastic surface-mounted package; 5 leads
SOT753
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1 × 0.5 mm
SOT886
SOT891




nexperia

74AHCT1G125GM Datasheet Preview

74AHCT1G125GM Datasheet

Bus buffer/line driver

No Preview Available !

Nexperia
74AHC1G125; 74AHCT1G125
Bus buffer/line driver; 3-state
4. Marking
Table 2. Marking codes
Type number
74AHC1G125GW
74AHCT1G125GW
74AHC1G125GV
74AHCT1G125GV
74AHC1G125GM
74AHCT1G125GM
74AHCT1G125GF
Marking [1]
AM
CM
A25
C25
AM
CM
CM
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
2A
Y4
1 OE
mna118
Fig. 1. Logic symbol
2
4
1
EN
mna119
Fig. 2. IEC logic symbol
6. Pinning information
A
Y
OE
Fig. 3. Logic diagram
mna120
6.1. Pinning
74AHC1G125
74AHCT1G125
OE 1
A2
5 VCC
GND 3
4Y
001aaf101
Fig. 4. Pin configuration
SOT353-1 (TSSOP5) and
SOT753 (SC-74A)
74AHC1G125
74AHCT1G125
OE 1
6 VCC
A2
5 n.c.
GND 3
4Y
001aaj971
Transparent top view
Fig. 5. Pin configuration
SOT886 (XSON6)
74AHC1G125
74AHCT1G125
OE 1
A2
6 VCC
5 n.c.
GND 3
4Y
001aaj972
Transparent top view
Fig. 6. Pin configuration
SOT891 (XSON6)
74AHC_AHCT1G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 13 October 2020
© Nexperia B.V. 2020. All rights reserved
2 / 15


Part Number 74AHCT1G125GM
Description Bus buffer/line driver
Maker nexperia
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74AHCT1G125GM Datasheet PDF






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