74AHCT273PW datasheet, flip-flop equivalent, nexperia

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74AHCT273PW Features and benefits

* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Inputs accept voltages higher than VCC
* Ideal buffer for MOS microcontroller o.

74AHCT273PW Application

where only the true output is required and the clock and master reset are common to all storage elements. 2. Features .

74AHCT273PW Description

The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with.

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