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74AHCT2G125DP Datasheet Preview

74AHCT2G125DP Datasheet

Dual buffer/line driver

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74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
Rev. 4 — 2 January 2019
Product data sheet
1. General description
The 74AHC2G125 and 74AHCT2G125 are high-speed Si-gate CMOS devices. They provide
a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by
the output enable input (nOE). A HIGH at nOE causes the output to assume a high-impedance
OFF-state.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name Description
74AHC2G125DP
74AHCT2G125DP
-40 °C to +125 °C
TSSOP8 plastic thin shrink small outline package;
8 leads; body width 3 mm; lead length 0.5 mm
74AHC2G125DC
74AHCT2G125DC
-40 °C to +125 °C
VSSOP8 plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
Version
SOT505-2
SOT765-1
4. Marking
Table 2. Marking codes
Type number
74AHC2G125DP
74AHCT2G125DP
74AHC2G125DC
74AHCT2G125DC
Marking[1]
A25
C25
A25
C25
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.




nexperia

74AHCT2G125DP Datasheet Preview

74AHCT2G125DP Datasheet

Dual buffer/line driver

No Preview Available !

Nexperia
5. Functional diagram
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
2 1A
1Y 6
1 1OE
5 2A
2Y 3
7 2OE
mce185
Fig. 1. Logic symbol
2
6
1
1
EN1
5
3
7
2
EN2
mce186
Fig. 2. IEC logic symbol
6. Pinning information
nA
nY
nOE
mna227
Fig. 3. Logic diagram (one buffer)
6.1. Pinning
74AHC2G125
74AHCT2G125
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
001aaj260
Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
1OE, 2OE
1, 7
1A, 2A
2, 5
GND
4
1Y, 2Y
6, 3
VCC
8
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Control
Input
Output
nOE
nA
nY
L
L
L
L
H
H
H
X
Z
74AHC_AHCT2G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 2 January 2019
© Nexperia B.V. 2019. All rights reserved
2 / 12


Part Number 74AHCT2G125DP
Description Dual buffer/line driver
Maker nexperia
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74AHCT2G125DP Datasheet PDF






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