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74AHCT573-Q100 - Octal D-type transparant latch

Download the 74AHCT573-Q100 datasheet PDF (74AHC573-Q100 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for octal d-type transparant latch.

Description

The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 2.0 V to 5.5 V.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger action.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • CMOS low power dissipation.
  • Common 3-state output enable input.
  • Input levels:.
  • For 74AHC573-Q.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74AHC573-Q100-nexperia.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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74AHC573-Q100; 74AHCT573-Q100 Octal D-type transparent latch; 3-state Rev. 2 — 13 July 2020 Product data sheet 1. General description The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs are overvoltage tolerant.
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