74ALVCH16543DGG transceiver equivalent, 16-bit d-type registered transceiver.
* CMOS low power consumption
* Direct interface with TTL levels
* MULTIBYTE flow-through standard pin-out architecture
* Back-to-back registers for storag.
* Complies with JEDEC standards:
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V t.
The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction.
Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are pro.
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