74ALVCH16600DGG Datasheet - nexperia

18-bit universal bus transceiver

74ALVCH16600DGG Features

* CMOS low power consumption

* MultiByte flow-through standard pin-out architecture

* Low inductance multiple VCC and GND pins for minimum noise and ground bounce

* Direct interface with TTL levels (2.7 V to 3.6 V)

* Bus hold on data inputs

* Output dr

74ALVCH16600DGG General Description

The 74ALVCH16600 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data .

74ALVCH16600DGG Datasheet (199.47 KB)