74ALVCH16843DGG Overview
The 74ALVCH16843 has two 9 bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE), clear (nCLR), preset (nPRE) and output enable (nOE) control gates. When nOE is LOW, the data in the registers appear at the outputs.
74ALVCH16843DGG Key Features
- Wide supply voltage range of 1.2V to 3.6V
- CMOS low power consumption
- Direct interface with TTL levels
- Current drive ±24 mA at VCC = 3.0 V
- MULTIBYTE flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for minimize noise and ground bounce
- All data inputs have bushold
- Output drive capability 50 Ω transmission lines at 85 °C
- 3-state non-inverting outputs for bus oriented
74ALVCH16843DGG Applications
- Wide supply voltage range of 1.2V to 3.6V
