Datasheet Details
| Part number | 74AUP1G0832 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 254.83 KB |
| Description | Low-power 3-input AND-OR gate |
| Datasheet |
 74AUP1G0832 Datasheet
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General Description
The 74AUP1G0832 is a single 3-input AND-OR gate.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
Key Features
- Wide supply voltage range from 0.8 V to 3.6 V.
- CMOS low power dissipation.
- High noise immunity.
- Overvoltage tolerant inputs to 3.6 V.
- Low noise overshoot and undershoot < 10 % of VCC.
- IOFF circuitry provides partial Power-down mode operation.
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
- Low static power consumption; ICC = 0.9 μA (maximum).
- Complies with JEDEC standards:.
- JESD8-12 (0.8.
