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74AVC1T1022 - 1-to-4 fan-out buffer

General Description

The 74AVC1T1022 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution.

It has dual supplies (VCC(A) and VCC(B)) for voltage translation.

It also has a data input (A), four data outputs (1Yn and 2Yn) and an output enable input (OE).

Key Features

  • Wide supply voltage range:.
  • VCC(A): 0.8 V to 3.6 V.
  • VCC(B): 0.8 V to 3.6 V.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65 V).
  • JESD8-7 (1.2 V to 1.95 V).
  • JESD8-5 (1.8 V to 2.7 V).
  • JESD8-B (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8 kV.
  • CDM JESD22-C101E exceeds 1000 V.
  • Maximum data rates:.
  • 380 Mbit/s.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74AVC1T1022 1-to-4 fan-out buffer Rev. 2 — 16 March 2017 Product data sheet 1 General description The 74AVC1T1022 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution. It has dual supplies (VCC(A) and VCC(B)) for voltage translation. It also has a data input (A), four data outputs (1Yn and 2Yn) and an output enable input (OE). VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V. It makes the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The levels of A, OE and 1Yn are referenced to VCC(A), outputs 2Yn are referenced to VCC(B). This supply configuration ensures that two of the fanned out signals can be used in level shifting.