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74HC109-Q100 Datasheet Preview

74HC109-Q100 Datasheet

Dual JK flip-flop

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74HC109-Q100; 74HCT109-Q100
Dual JK flip-flop with set and reset; positive-edge-trigger
Rev. 1 — 28 September 2016
Product data sheet
1. General description
The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop
featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD)
inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active
LOW inputs and operate independently of the clock input. The nJ and nK inputs control
the state changes of the flip-flops as described in the mode select function table. The nJ
and nK inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition
for predictable operation. The JK design allows operation as a D-type flip-flop by
connecting the nJ and nK inputs together. Inputs include clamp diodes. It enables the use
of current limiting resistors to interface inputs to voltages in excess of VCC.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock
rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Input levels:
For 74HC109-Q100: CMOS level
For 74HCT109-Q100: TTL level
J and K inputs for easy D-type flip-flop
Toggle flip-flop or “do nothing” mode
Specified in compliance with JEDEC standard no. 7A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )




nexperia

74HC109-Q100 Datasheet Preview

74HC109-Q100 Datasheet

Dual JK flip-flop

No Preview Available !

Nexperia
74HC109-Q100; 74HCT109-Q100
Dual JK flip-flop with set and reset; positive-edge-trigger
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name Description
Version
74HC109D-Q100 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT109D-Q100
4. Functional diagram
 
6' 6'
6'


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5'
4
4
5' 5'




 
PQD
Fig 1. Logic symbol
6

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5
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D
Fig 2. IEC logic symbol
E PQD
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6
5
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Fig 3. Logic diagram (one flip-flop)
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&
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4
4
DDD
74HC_HCT109_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 28 September 2016
© Nexperia B.V. 2017. All rights reserved
2 of 17


Part Number 74HC109-Q100
Description Dual JK flip-flop
Maker nexperia
Total Page 17 Pages
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