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74HC2G86-Q100 Datasheet Preview

74HC2G86-Q100 Datasheet

Dual 2-input EXCLUSIVE-OR gate

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74HC2G86-Q100;
74HCT2G86-Q100
Dual 2-input EXCLUSIVE-OR gate
Rev. 2 — 18 December 2018
Product data sheet
1. General description
The 74HC2G86-Q100; 74HCT2G86-Q100 is a dual 2-input EXCLUSIVE-OR gate. Inputs include
clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC2G86-Q100: CMOS level
For 74HCT2G86-Q100: TTL level
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74HC2G86DP-Q100 -40 °C to +125 °C
Name
TSSOP8
74HC2G86DC-Q100
74HCT2G86DC-Q100
-40 °C to +125 °C
VSSOP8
Description
Version
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
4. Marking
Table 2. Marking code
Type number
74HC2G86DP-Q100
74HC2G86DC-Q100
Marking code[1]
H86
H86




nexperia

74HC2G86-Q100 Datasheet Preview

74HC2G86-Q100 Datasheet

Dual 2-input EXCLUSIVE-OR gate

No Preview Available !

Nexperia
74HC2G86-Q100; 74HCT2G86-Q100
Dual 2-input EXCLUSIVE-OR gate
Type number
74HCT2G86DC-Q100
Marking code[1]
T86
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1A 1Y
1B
2A 2Y
2B
Fig. 1. Logic symbol
001aah760
B
A
Fig. 3. Logic diagram (one gate)
=1
=1
001aah761
Fig. 2. IEC logic symbol
Y
mna040
6. Pinning information
6.1. Pinning
74HC2G86
74HCT2G86
1A
1B
2Y
GND
1
2
3
4
8 VCC
7 1Y
6 2B
5 2A
001aak026
Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
VCC
Pin
1, 5
2, 6
4
7, 3
8
Description
data input
data input
ground (0 V)
data output
supply voltage
74HC_HCT2G86_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 18 December 2018
© Nexperia B.V. 2018. All rights reserved
2 / 11


Part Number 74HC2G86-Q100
Description Dual 2-input EXCLUSIVE-OR gate
Maker nexperia
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