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74HC32D Datasheet Preview

74HC32D Datasheet

Quad 2-input OR gate

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74HC32; 74HCT32
Quad 2-input OR gate
Rev. 7 — 30 September 2019
Product data sheet
1. General description
The 74HC32; 74HCT32 is a quad 2-input OR gate. Inputs include clamp diodes. This enables the
use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A
Input levels:
For 74HC32: CMOS level
For 74HCT32: TTL level
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC32D
-40 °C to +125 °C SO14
74HCT32D
74HC32DB
-40 °C to +125 °C SSOP14
74HCT32DB
74HC32PW
-40 °C to +125 °C TSSOP14
74HCT32PW
74HC32BQ
-40 °C to +125 °C DHVQFN14
74HCT32BQ
Description
plastic small outline package; 14 leads;
body width 3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal
SOT762-1
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm




nexperia

74HC32D Datasheet Preview

74HC32D Datasheet

Quad 2-input OR gate

No Preview Available !

Nexperia
4. Functional diagram
1
≥1
3
2
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
1Y 3
2Y 6
3Y 8
4Y 11
mna242
Fig. 1. Logic symbol
4
≥1
6
5
9
≥1
8
10
12
≥1
11
13
mna243
Fig. 2. IEC logic symbol
5. Pinning information
74HC32; 74HCT32
Quad 2-input OR gate
A
Y
B
mna241
Fig. 3. Logic diagram (one gate)
5.1. Pinning
1A 1
1B 2
14 VCC
13 4B
1Y 3
12 4A
2A 4
32
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
001aad101
Fig. 4. Pin configuration SOT108-1 (SO14),
SOT337-1 (SSOP14) and SOT402-1 (TSSOP14)
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
32
GND(1)
13 4B
12 4A
11 4Y
10 3B
9 3A
001aad102
Fig. 5.
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
Pin configuration SOT762-1 (DHVQFN14)
5.2. Pin description
Table 2. Pin description
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
Pin
1, 4, 9, 12
2, 5, 10,13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
74HC_HCT32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 30 September 2019
© Nexperia B.V. 2019. All rights reserved
2 / 13


Part Number 74HC32D
Description Quad 2-input OR gate
Maker nexperia
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74HC32D Datasheet PDF






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