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74HCT238-Q100 - 3-to-8 line decoder/demultiplexer

Download the 74HCT238-Q100 datasheet PDF (74HC238-Q100 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 3-to-8 line decoder/demultiplexer.

Description

The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Demultiplexing capability.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Active HIGH mutually exclusive outputs.
  • Multiple package options.
  • Complies with JEDEC standard no. 7A.
  • Input levels:.
  • For 74HC238: CMOS level.
  • For 74HCT238: TTL.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC238-Q100-nexperia.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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74HC238-Q100; 74HCT238-Q100 3-to-8 line decoder/demultiplexer Rev. 3 — 3 April 2020 Product data sheet 1. General description The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes.
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