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74HCT377-Q100 - Octal D-type flip-flop

Download the 74HCT377-Q100 datasheet PDF (74HC377-Q100 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for octal d-type flip-flop.

Description

The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Common clock and master reset.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC377-Q100-nexperia.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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74HC377-Q100; 74HCT377-Q100 Octal D-type flip-flop with data enable; positive-edge trigger Rev. 3 — 5 August 2024 Product data sheet 1. General description The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
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