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74HCT574D - Octal D-type flip-flop

Download the 74HCT574D datasheet PDF. This datasheet also covers the 74HC574 variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs.

Key Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Input levels:.
  • For 74HC574: CMOS level.
  • For 74HCT574: TTL level.
  • 3-state non-inverting outputs for bus oriented.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC574-nexperia.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT574 Octal D-type flip-flop NXP
74HCT574 Octal D-Type Flip-Flop Texas Instruments
74HCT573 Octal D-type transparent latch NXP
74HCT533 Octal D-type transparent latch Philips
74HCT534 Octal D-type flip-flop Philips

Other Datasheets by Nexperia

Part Number Description
74HCT574 Octal D-type flip-flop
74HCT574-Q100 Octal D-type flip-flop
74HCT573 Octal D-type transparent latch
74HCT573-Q100 Octal D-type transparent latch
74HCT573D Octal D-type transparent latch

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC574; 74HCT574 Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 9 — 20 October 2022 Product data sheet 1. General description The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.