Datasheet4U Logo Datasheet4U.com

74LV164D - 8-bit serial-in/parallel-out shift register

Download the 74LV164D datasheet PDF. This datasheet also covers the 74LV164 variant, as both devices belong to the same 8-bit serial-in/parallel-out shift register family and are provided as variant models within a single manufacturer datasheet.

Description

The 74LV164 is an 8-bit serial-in/parallel-out shift register.

Features

  • Wide supply voltage range from 1.0 V to 5.5 V.
  • CMOS low power dissipation.
  • Optimized for low-voltage.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74LV164-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 74LV164D
Manufacturer Nexperia
File Size 255.05 KB
Description 8-bit serial-in/parallel-out shift register
Datasheet download datasheet 74LV164D Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74LV164 8-bit serial-in/parallel-out shift register Philips
74LV161 Presettable synchronous 4-bit binary counter Philips
74LV163 Presettable synchronous 4-bit binary counter Philips
74LV165 8-bit parallel-in/serial-out shift register Philips
74LV10 Triple 3-input NAND gate Philips

Other Datasheets by Nexperia

Part Number Description
74LV164 8-bit serial-in/parallel-out shift register
74LV164-Q100 8-bit serial-in/parallel-out shift register
74LV165 8-bit parallel-in/serial-out shift register
74LV165-Q100 8-bit parallel-in/serial-out shift register
74LV165A 8-bit parallel-in/serial-out shift register

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LV164 8-bit serial-in/parallel-out shift register Rev. 6 — 15 September 2021 Product data sheet 1. General description The 74LV164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transition of the clock input (CP). A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • Wide supply voltage range from 1.
Published: |