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74LV1T32GW Datasheet Preview

74LV1T32GW Datasheet

2-input single supply translating OR gate

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74LV1T32
2-input single supply translating OR gate
Rev. 2 — 3 December 2019
Product data sheet
1. General description
The 74LV1T32 is a single, level translating 2-input OR gate. The low threshold inputs support 1.8 V
input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V
tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output
level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS levels.
The wide VCC range permits the generation of output levels to connect to controllers or processors.
2. Features and benefits
Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V
Up translation
1.2 V to 1.8 V at VCC = 1.8 V
1.5 V to 2.5 V at VCC = 2.5 V
1.8 V to 3.3 V at VCC = 3.3 V
3.3 V to 5.0 V at VCC = 5.0 V
Down translation
3.3 V to 1.8 V at VCC = 1.8 V
3.3 V to 2.5 V at VCC = 2.5 V
5.0 V to 3.3 V at VCC = 3.3 V
5 V tolerant inputs
Latch-up performance exceeds 250 mA per JESD 78 Class II
ESD protection:
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
CDM JESD22-C101F exceeds 1 kV
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
Portable applications
PC and notebooks
Industrial controller
Telecom




nexperia

74LV1T32GW Datasheet Preview

74LV1T32GW Datasheet

2-input single supply translating OR gate

No Preview Available !

Nexperia
74LV1T32
2-input single supply translating OR gate
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description
74LV1T32GW -40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
74LV1T32GV -40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads
74LV1T32GX -40 °C to +125 °C X2SON5 plastic thermal enhanced extremely thin small outline
package; no leads; 5 terminals; body 0.8 x 0.8 x 0.35 mm
Version
SOT353-1
SOT753
SOT1226
5. Marking
Table 2. Marking
Type number
74LV1T32GW
74LV1T32GV
74LV1T32GX
Marking code[1]
SB
SB
SB
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
1B
2A
Y4
mna164
Fig. 1. Logic symbol
1
≥1
4
2
mna165
Fig. 2. IEC logic symbol
B
A
Fig. 3. Logic diagram
Y
mna166
74LV1T32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 December 2019
© Nexperia B.V. 2019. All rights reserved
2 / 13


Part Number 74LV1T32GW
Description 2-input single supply translating OR gate
Maker nexperia
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74LV1T32GW Datasheet PDF






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