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74LV4094PW Datasheet Preview

74LV4094PW Datasheet

8-stage shift-and-store bus register

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74LV4094
8-stage shift-and-store bus register
Rev. 6 — 14 November 2018
Product data sheet
1. General description
The 74LV4094 is a low voltage Si-gate CMOS device and is pin and functional compatible with
74HC4094; 74HCT4094.
The 74LV4094 is an 8-stage serial shift register. It has a storage latch associated with each stage
for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel
outputs may be connected directly to common bus lines. Data is shifted on positive-going clock
transitions. The data in each shift register stage is transferred to the storage register when the
strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the
output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of 74LV4094 devices.
Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in
cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next
negative going clock edge. This is used for cascading 74LV4094 devices when the clock has a
slow rise time.
2. Features and benefits
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
Serial-to-parallel data conversion
Remote control holding register
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74LV4094D
-40 °C to +125 °C
Name
SO16
74LV4094DB -40 °C to +125 °C SSOP16
74LV4094PW -40 °C to +125 °C TSSOP16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT109-1
SOT338-1
SOT403-1




nexperia

74LV4094PW Datasheet Preview

74LV4094PW Datasheet

8-stage shift-and-store bus register

No Preview Available !

Nexperia
5. Functional diagram
3
1
CP STR
QS1 9
QS2 10
QP0 4
QP1 5
2D
QP2 6
QP3 7
QP4 14
QP5 13
QP6 12
QP7 11
OE
15
Fig. 1. Functional diagram
001aaf111
2D
3 CP
1 STR
74LV4094
8-stage shift-and-store bus register
1
C2
15
EN3
SRG8
3
C1/
2
1D
2D 3
4
5
6
7
14
13
12
11
9
10
Fig. 2. Logic symbol
001aaf112
8-STAGE SHIFT
REGISTER
8-BIT STORAGE
REGISTER
QS2 10
QS1 9
Fig. 3. Logic diagram
15 OE
3-STATE OUTPUTS
QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7
4 5 6 7 14 13 12 11 001aaf119
74LV4094
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 14 November 2018
© Nexperia B.V. 2018. All rights reserved
2 / 17


Part Number 74LV4094PW
Description 8-stage shift-and-store bus register
Maker nexperia
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74LV4094PW Datasheet PDF






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1 74LV4094PW 8-stage shift-and-store bus register
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