74LV74D Datasheet - nexperia

Dual D-type flip-flop

74LV74D Features

* Wide supply voltage range from 1.0 V to 5.5 V

* Optimized for low voltage applications from 1.0 V to 3.6 V

* CMOS low power dissipation

* Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

* Direct interface with TTL levels (2.7 V to 3.6 V)

74LV74D General Description

The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the .

74LV74D Datasheet (246.65 KB)