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74LVC1G00GW Datasheet Preview

74LVC1G00GW Datasheet

Single 2-input NAND gate

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74LVC1G00
Single 2-input NAND gate
Rev. 12 — 6 February 2019
Product data sheet
1. General description
The 74LVC1G00 provides the single 2-input NAND function.
Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices
in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C




nexperia

74LVC1G00GW Datasheet Preview

74LVC1G00GW Datasheet

Single 2-input NAND gate

No Preview Available !

Nexperia
74LVC1G00
Single 2-input NAND gate
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVC1G00GW
-40 °C to +125 °C
74LVC1G00GV
74LVC1G00GM
-40 °C to +125 °C
-40 °C to +125 °C
74LVC1G00GF
-40 °C to +125 °C
74LVC1G00GN
-40 °C to +125 °C
74LVC1G00GS
-40 °C to +125 °C
74LVC1G00GX
-40 °C to +125 °C
Name
TSSOP5
SC-74A
XSON6
XSON6
XSON6
XSON6
X2SON5
Description
Version
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
plastic surface-mounted package; 5 leads
SOT753
plastic extremely thin small outline package; SOT886
no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
extremely thin small outline package; no leads; SOT1115
6 terminals; body 0.9 x 1.0 x 0.35 mm
extremely thin small outline package; no leads; SOT1202
6 terminals; body 1.0 x 1.0 x 0.35 mm
X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads;
5 terminals; body 0.8 x 0.8 x 0.35 mm
SOT1226
4. Marking
Table 2. Marking codes
Type number
74LVC1G00GW
74LVC1G00GV
74LVC1G00GM
74LVC1G00GF
74LVC1G00GN
74LVC1G00GS
74LVC1G00GX
Marking[1]
VA
V00
VA
VA
VA
VA
VA
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1B
2A
Y4
mna097
Fig. 1. Logic symbol
1
&
4
2
mna098
Fig. 2. IEC logic symbol
B
A
Fig. 3. Logic diagram
Y
mna099
74LVC1G00
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 6 February 2019
© Nexperia B.V. 2019. All rights reserved
2 / 17


Part Number 74LVC1G00GW
Description Single 2-input NAND gate
Maker nexperia
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74LVC1G00GW Datasheet PDF






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