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74LVC2G00GT Datasheet Preview

74LVC2G00GT Datasheet

Dual 2-input NAND gate

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74LVC2G00
Dual 2-input NAND gate
Rev. 15 — 3 July 2017
Product data sheet
1 General description
The 74LVC2G00 provides a 2-input NAND gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
2 Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3 Ordering information
Table 1. Ordering information
Type number Package
Temperature
range
74LVC2G00DP -40 °C to +125 °C
74LVC2G00DC -40 °C to +125 °C
Name Description
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
Version
SOT505-2
SOT765-1




nexperia

74LVC2G00GT Datasheet Preview

74LVC2G00GT Datasheet

Dual 2-input NAND gate

No Preview Available !

Nexperia
74LVC2G00
Dual 2-input NAND gate
Type number
74LVC2G00GT
Package
Temperature
range
-40 °C to +125 °C
74LVC2G00GF -40 °C to +125 °C
74LVC2G00GM -40 °C to +125 °C
74LVC2G00GN -40 °C to +125 °C
74LVC2G00GS -40 °C to +125 °C
74LVC2G00GX -40 °C to +125 °C
Name Description
Version
XSON8 plastic extremely thin small outline package; no leads;
8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
SOT1089
XQFN8 plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-2
XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
SOT1116
XSON8 extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
SOT1203
X2SON8 plastic thermal enhanced extremely thin small outline
SOT1233
package; no leads; 8 terminals; body 1.35 x 0.8 x 0.35 mm
4 Marking
Table 2. Marking codes
Type number
74LVC2G00DP
74LVC2G00DC
74LVC2G00GT
74LVC2G00GF
74LVC2G00GM
74LVC2G00GN
74LVC2G00GS
74LVC2G00GX
Marking code[1]
V2G00
V00
V00
VA
V00
VA
VA
VA
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5 Functional diagram
1A
1Y
1B
2A
2Y
2B
001aah748
Figure 1.  Logic symbol
&
&
001aah749
Figure 2.  IEC logic symbol
B
Y
A
mna099
Figure 3.  Logic diagram (one gate)
74LVC2G00
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 15 — 3 July 2017
© Nexperia B.V. 2017. All rights reserved.
2 / 21


Part Number 74LVC2G00GT
Description Dual 2-input NAND gate
Maker nexperia
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74LVC2G00GT Datasheet PDF






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