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74LVC32AD Datasheet Preview

74LVC32AD Datasheet

Quad 2-input OR gate

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74LVC32A
Quad 2-input OR gate
Rev. 7 — 27 May 2020
Product data sheet
1. General description
The 74LVC32A is a quad 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices.
This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Overvoltage tolerant inputs to 5.5 V
CMOS low power dissipation
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74LVC32AD
-40 °C to +125 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74LVC32ADB
-40 °C to +125 °C SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
74LVC32APW
-40 °C to +125 °C
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74LVC32ABQ
-40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1




nexperia

74LVC32AD Datasheet Preview

74LVC32AD Datasheet

Quad 2-input OR gate

No Preview Available !

Nexperia
4. Functional diagram
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
Fig. 1. Logic symbol
1Y 3
2Y 6
3Y 8
4Y 11
mna242
A
B
Fig. 3. Logic diagram for one gate
5. Pinning information
5.1. Pinning
74LVC32A
1A 1
1B 2
14 VCC
13 4B
1Y 3
12 4A
2A 4
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
aaa-028965
Fig. 4. Pin configuration SOT108-1 (SO14)
74LVC32A
Quad 2-input OR gate
1
≥1
3
2
4
≥1
6
5
9
≥1
8
10
12
≥1
11
13
Fig. 2. IEC logic symbol
mna243
Y
mna241
74LVC32A
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
aaa-028966
Fig. 5. Pin configuration SOT337-1 (SSOP14) and
SOT402-1 (TSSOP14)
74LVC32A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 27 May 2020
© Nexperia B.V. 2020. All rights reserved
2 / 14


Part Number 74LVC32AD
Description Quad 2-input OR gate
Maker nexperia
PDF Download

74LVC32AD Datasheet PDF






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