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74LVC3G17GN Datasheet Preview

74LVC3G17GN Datasheet

Triple non-inverting Schmitt trigger

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74LVC3G17

Triple non-inverting Schmitt trigger with 5 V tolerant input

Rev. 13 — 27 November 2018

Product data sheet

1. General description

The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of

transforming slowly changing input signals into sharply defined, jitter-free output signals.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the

74LVC3G17 as a translator in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing a damaging backflow current through the device when it is powered

down.

2. Features and benefits

• Wide supply voltage range from 1.65 V to 5.5 V

• 5 V tolerant input/output for interfacing with 5 V logic

• High noise immunity

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• ±24 mA output drive (VCC = 3.0 V)

• CMOS low-power consumption

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Applications

• Wave and pulse shapers for highly noisy environments

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74LVC3G17GN Datasheet Preview

74LVC3G17GN Datasheet

Triple non-inverting Schmitt trigger

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Nexperia

74LVC3G17

Triple non-inverting Schmitt trigger with 5 V tolerant input

4. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range

74LVC3G17DP

-40 °C to +125 °C

74LVC3G17DC

-40 °C to +125 °C

74LVC3G17GT

-40 °C to +125 °C

74LVC3G17GF

-40 °C to +125 °C

74LVC3G17GM

-40 °C to +125 °C

74LVC3G17GN

-40 °C to +125 °C

74LVC3G17GS

-40 °C to +125 °C

Name

TSSOP8

VSSOP8

XSON8

XQFN8

XSON8

Description

Version

plastic thin shrink small outline package; 8 leads; SOT505-2

body width 3 mm; lead length 0.5 mm

plastic very thin shrink small outline package;

8 leads; body width 2.3 mm

SOT765-1

plastic extremely thin small outline package;

no leads; 8 terminals; body 1 × 1.95 × 0.5 mm

SOT833-1

extremely thin small outline package; no leads;

8 terminals; body 1.35 × 1 × 0.5 mm

SOT1089

plastic, extremely thin quad flat package; no leads; SOT902-2

8 terminals; body 1.6 × 1.6 × 0.5 mm

extremely thin small outline package; no leads;

8 terminals; body 1.2 × 1.0 × 0.35 mm

SOT1116

extremely thin small outline package; no leads;

8 terminals; body 1.35 × 1.0 × 0.35 mm

SOT1203

5. Marking

Table 2. Marking codes

Type number

74LVC3G17DP

74LVC3G17DC

74LVC3G17GT

74LVC3G17GF

74LVC3G17GM

74LVC3G17GN

74LVC3G17GS

Marking code [1]

V17

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

6. Functional diagram

001aah860

Fig. 1. Logic symbol

001aah861

Fig. 2. IEC logic symbol

001aab109

Fig. 3. Logic diagram (one gate)

74LVC3G17

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 13 — 27 November 2018

2 / 18

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74LVC3G17GN Datasheet

Triple non-inverting Schmitt trigger

74LVC3G17GN Datasheet

Triple non-inverting Schmitt trigger

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