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74LVCH1T45GN Datasheet Preview

74LVCH1T45GN Datasheet

Dual supply translating transceiver

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74LVC1T45; 74LVCH1T45
Dual supply translating transceiver; 3-state
Rev. 7 — 19 March 2019
Product data sheet
1. General description
The 74LVC1T45; 74LVCH1T45 are single bit, dual supply transceivers with 3-state outputs
that enable bidirectional level translation. They feature two 1-bit input-output ports (A and B), a
direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can
be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating
between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and DIR
are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission
from A to B and a LOW on DIR allows transmission from B to A.
The devices are fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing any damaging backflow current through the device
when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level,
both A port and B port are in the high-impedance OFF-state.
Active bus hold circuitry in the 74LVCH1T45 holds unused or floating data inputs at a valid logic
level.
2. Features and benefits
Wide supply voltage range:
VCC(A): 1.2 V to 5.5 V
VCC(B): 1.2 V to 5.5 V
High noise immunity
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
CDM JESD22-C101E exceeds 1000 V
Maximum data rates:
420 Mbps (3.3 V to 5.0 V translation)
210 Mbps (translate to 3.3 V))
140 Mbps (translate to 2.5 V)
75 Mbps (translate to 1.8 V)
60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
±24 mA output drive (VCC = 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 16 μA maximum ICC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C




nexperia

74LVCH1T45GN Datasheet Preview

74LVCH1T45GN Datasheet

Dual supply translating transceiver

No Preview Available !

Nexperia
74LVC1T45; 74LVCH1T45
Dual supply translating transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVC1T45GW
-40 °C to +125 °C
74LVCH1T45GW
74LVC1T45GM
-40 °C to +125 °C
74LVCH1T45GM
74LVC1T45GF
-40 °C to +125 °C
74LVCH1T45GF
74LVC1T45GN
-40 °C to +125 °C
74LVCH1T45GN
74LVC1T45GS
-40 °C to +125 °C
74LVCH1T45GS
Name
SC-88
XSON6
XSON6
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
Version
SOT363
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1 × 0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0 × 1.0 × 0.35 mm
SOT886
SOT891
SOT1115
SOT1202
4. Marking
Table 2. Marking
Type number
74LVC1T45GW
74LVCH1T45GW
74LVC1T45GM
74LVCH1T45GM
74LVC1T45GF
74LVCH1T45GF
74LVC1T45GN
74LVCH1T45GN
74LVC1T45GS
74LVCH1T45GS
Marking code [1]
V5
X5
V5
X5
V5
X5
V5
X5
V5
X5
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
DIR 5
A3
VCC(A)
Fig. 1. Logic symbol
VCC(B)
4B
001aag885
DIR
A
VCC(A)
Fig. 2. Logic diagram
B
VCC(B)
001aag886
74LVC_LVCH1T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 19 March 2019
© Nexperia B.V. 2019. All rights reserved
2 / 31


Part Number 74LVCH1T45GN
Description Dual supply translating transceiver
Maker nexperia
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74LVCH1T45GN Datasheet PDF






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