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74LVCH2T45GM Datasheet Preview

74LVCH2T45GM Datasheet

Dual supply translating transceiver

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74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
Rev. 9 — 13 August 2018
Product data sheet
1. General description
The 74LVC2T45; 74LVCH2T45 are dual bit, dual supply translating transceivers with 3-state
outputs that enable bidirectional level translation. They feature two 2-bits input-output ports
(nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A)
and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable
for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).
Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR
allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.
The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and
B port are in the high-impedance OFF-state.
Active bus hold circuitry in the 74LVCH2T45 holds unused or floating data inputs at a valid logic
level.
2. Features and benefits
Wide supply voltage range:
VCC(A): 1.2 V to 5.5 V
VCC(B): 1.2 V to 5.5 V
High noise immunity
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Maximum data rates:
420 Mbps (3.3 V to 5.0 V translation)
210 Mbps (translate to 3.3 V))
140 Mbps (translate to 2.5 V)
75 Mbps (translate to 1.8 V)
60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
±24 mA output drive (VCC = 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 16 μA maximum ICC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C




nexperia

74LVCH2T45GM Datasheet Preview

74LVCH2T45GM Datasheet

Dual supply translating transceiver

No Preview Available !

Nexperia
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74LVC2T45DC
-40 °C to +125 °C VSSOP8
74LVCH2T45DC
74LVC2T45GT
-40 °C to +125 °C XSON8
74LVCH2T45GT
74LVC2T45GF
-40 °C to +125 °C XSON8
74LVCH2T45GF
74LVC2T45GM
-40 °C to +125 °C XQFN8
74LVCH2T45GM
74LVC2T45GN
-40 °C to +125 °C XSON8
74LVCH2T45GN
74LVC2T45GS
-40 °C to +125 °C XSON8
74LVCH2T45GS
Description
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic extremely thin small outline package;
no leads; 8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1 × 0.5 mm
plastic, extremely thin quad flat package;
no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1.0 × 0.35 mm
Version
SOT765-1
SOT833-1
SOT1089
SOT902-2
SOT1116
SOT1203
4. Marking
Table 2. Marking
Type number
74LVC2T45DC
74LVCH2T45DC
74LVC2T45GT
74LVCH2T45GT
74LVC2T45GF
74LVCH2T45GF
74LVC2T45GM
74LVCH2T45GM
74LVC2T45GN
74LVCH2T45GN
74LVC2T45GS
74LVCH2T45GS
Marking code [1]
V45
X45
V45
X45
V5
X5
V45
X45
V5
X5
V5
X5
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74LVC_LVCH2T45
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 13 August 2018
© Nexperia B.V. 2018. All rights reserved
2 / 34


Part Number 74LVCH2T45GM
Description Dual supply translating transceiver
Maker nexperia
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74LVCH2T45GM Datasheet PDF






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