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74LVCH8T245PW Datasheet Preview

74LVCH8T245PW Datasheet

8-bit dual supply translating transceiver

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74LVC8T245; 74LVCH8T245
8-bit dual supply translating transceiver; 3-state
Rev. 4 — 22 September 2020
Product data sheet
1. General description
The 74LVC8T245; 74LVCH8T245 are 8-bit dual supply translating transceivers with 3-state outputs
that enable bidirectional level translation. They feature two data input-output ports (pins An and
Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and
VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making
the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V,
3.3 V and 5.0 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to
VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission
from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are
effectively isolated.
The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and
B port are in the high-impedance OFF-state.
Active bus hold circuitry in the 74LVCH8T245 holds unused or floating data inputs at a valid logic
level.
2. Features and benefits
Wide supply voltage range:
VCC(A): 1.2 V to 5.5 V
VCC(B): 1.2 V to 5.5 V
High noise immunity
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Maximum data rates:
420 Mbps (3.3 V to 5.0 V translation)
210 Mbps (translate to 3.3 V)
140 Mbps (translate to 2.5 V)
75 Mbps (translate to 1.8 V)
60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78B Class II
±24 mA output drive (VCC = 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 30 μA maximum ICC
IOFF circuitry provides partial Power-down mode operation
Specified from -40 °C to +85 °C and -40 °C to +125 °C




nexperia

74LVCH8T245PW Datasheet Preview

74LVCH8T245PW Datasheet

8-bit dual supply translating transceiver

No Preview Available !

Nexperia
74LVC8T245; 74LVCH8T245
8-bit dual supply translating transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74LVC8T245PW -40 °C to +125 °C
74LVCH8T245PW
TSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
74LVC8T245BQ -40 °C to +125 °C
74LVCH8T245BQ
DHVQFN24 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 24 terminals;
body 3.5 × 5.5 × 0.85 mm
Version
SOT355-1
SOT815-1
4. Functional diagram
VCC(A)
B1
21
VCC(B)
B2
20
B3
19
B4
18
B5
17
B6
16
B7
15
B8
14
OE 22
DIR 2
3
4
5
6
7
8
9
10
A1
A2
A3
A4
A5
A6
A7
A8
001aai472
Fig. 1. Logic symbol
DIR
OE
A1
VCC(A)
B1
VCC(B)
Fig. 2. Logic diagram (one channel)
to other seven channels
001aai473
74LVC_LVCH8T245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 22 September 2020
© Nexperia B.V. 2020. All rights reserved
2 / 26


Part Number 74LVCH8T245PW
Description 8-bit dual supply translating transceiver
Maker nexperia
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