HEF4014B-Q100 Description
The HEF4014B-Q100 is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (D0 to D7). It has a synchronous serial data input (DS), a synchronous parallel enable input (PE) and a LOW-to-HIGH edge-triggered clock input (CP). It also has buffered parallel outputs from the last three stages (Q5 to Q7).
HEF4014B-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 3)
- Specified from -40 °C to +85 °C
- Tolerant of slow clock rise and fall times
- Fully static operation
- 5 V, 10 V, and 15 V parametric ratings
- Standardized symmetrical output characteristics
- ESD protection
- MIL-STD-833, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
HEF4014B-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 3)
- Specified from -40 °C to +85 °C