* DLL aligns DQ and DQS transition with CK transition
* Double-data-rate architecture.
* Bi-directional data strobe (DQS)
* Differential clock inputs(CK and /CK)
* Auto refresh and self refresh
* 8192 refresh cycles / 64ms
* Power supply: Vdd,Vddq:2.5
ADBDB1608 Datasheet (776.05 KB)
ADBDB1608
A-Data Technology
776.05 KB
Ddr sdram 184pin dimm.
www.DataSheet.co.kr
A-Data
Revision History Revision 1 ( Dec. 2001 )
1.Fister release.
ADBCB1916
Revision 2 ( Apr. 2002 )
1. Changed module current.
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