Description
www.DataSheet.co.kr A-Data Revision History Revision 1 ( Dec.2001 ) 1.Fister release.ADBCB1916 Revision 2 ( Apr.2002 ) 1.Changed module current.
The ADBCB1916 is 64Mx64 bits Double Data Rate SDRAM Modules, The modules are composed of sixteen 32Mx8 bits CMOS Double Data Rate SDRAMs in TSOP-II 40.
Features
* DLL aligns DQ and DQS transition with CK transition
* Double-data-rate architecture.
* Bi-directional data strobe (DQS)
* Differential clock inputs(CK and /CK)
* Auto refresh and self refresh
* 8192 refresh cycles / 64ms
* Power supply: Vdd,Vddq:2.5
