* 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes combined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with individual power-down: - Multi-channel DMA - 4 Timer Channels with
HMS30C7202 Datasheet (7.46 MB)
HMS30C7202
ABOV
7.46 MB
Highly-integrated mpu.
HMS30C7202 Highly-integrated MPU (ARM Based 32-Bit Microprocessor) Datasheet Version 1.9 ABOV Semiconductor Ltd. HMS30C7202 HMS30C7202 © 2006 ABOV S.
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