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AMD-8131BLC - Hyper Transport PCI-X Tunnel

Datasheet Summary

Description

at any time without notice.

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Features

  • HyperTransport technology tunnel with side A and side B.
  • Side A is 16 bits (input and output); side B is 8 bits.
  • Either side may connect to the host or to a downstream HyperTransport technology compliant device.
  • Each side supports HyperTransport technology-defined reduced bit widths: 8-bit, 4-bit, and 2-bit.
  • Each side supports transfer rates of 1600, 1200, 800, and 400 mega-transfers per second.
  • Maximum bandwidth is 6.4 gigabytes per second acros.

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Datasheet preview – AMD-8131BLC

Datasheet Details

Part number AMD-8131BLC
Manufacturer AMD
File Size 1.17 MB
Description Hyper Transport PCI-X Tunnel
Datasheet download datasheet AMD-8131BLC Datasheet
Additional preview pages of the AMD-8131BLC datasheet.

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Full PDF Text Transcription

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24637 Rev 3.02 - August 10, 2004 AMD-8131TM PCI-X Tunnel Data Sheet AMD-8131TM HyperTransportTM PCI-X Tunnel Data Sheet 1 Overview Cover page The AMD-8131TM HyperTransportTM PCI-XTunnel (referred to as the IC in this document) is a HyperTransport™ technology (referred to as link in this document) tunnel developed by AMD that provides two PCI-X bridges. 1.1 • Device Features HyperTransport technology tunnel with side A and side B. • Side A is 16 bits (input and output); side B is 8 bits. • Either side may connect to the host or to a downstream HyperTransport technology compliant device. • Each side supports HyperTransport technology-defined reduced bit widths: 8-bit, 4-bit, and 2-bit. • Each side supports transfer rates of 1600, 1200, 800, and 400 mega-transfers per second.
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