PLP3 Datasheet - AMI

PLP3 CMOS Gate Array

PLP3 is a programmable pull-up/pull-down buffer piece. Logic Symbol Truth Table PLP3 PADM ma mb MA MB PADM Function L L Pull-down HH Pull-up HL Tristate L H Tristate HDL Syntax Verilog PLP3 inst_name (PADM, MA, MB); VHDL inst_name: PLP3 port map (PADM, MA, MB); Power Characteristics .

PLP3-AMI.pdf

PLP3 Datasheet Preview — Preview of PLP3 PDF

Datasheet Details

Part number:

PLP3

Manufacturer:

AMI

File Size:

17.61 KB

Description:

Cmos gate array.

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