43L0616A - A43L0616A
The A43L0616A is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 X 524,288 words by 16 bits, fabricated with AMIC’s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of system clock.
I/O transactions are possible on every clock cycle
A43L0616A 512K X 16 Bit X 2 Banks Synchronous DRAM Document Title 512K X 16 Bit X 2 Banks Synchronous DRAM Revision History Rev.
No.
0.0 0.1 www.DataSheet4U.com History Initial issue Add input/output capacitance specification Add Cl2 spec for (-5, -5.5, -6) Modify MRS Set Cycle Waveform error Issue Date December 4, 2000 February 13, 2001 Remark Preliminary 0.2 1.0 Add -U for industrial operating temperature range Final spec.
release Some AC parameter unit update April 11, 2001 May 29, 200
43L0616A Features
* n n n n JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) n All inputs are sampled at the positive going edge of the sys
