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A67P06361 (A67P06361 / A67P16181) Flow-through ZeBL SRAM

A67P06361 Description

www.DataSheet4U.com A67P16181/A67P06361 Series Preliminary Document Title 2M X 18, 1M X 36 LVTTL, Flow-through ZeBLTM SRAM Revision History Rev.No..
The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.

A67P06361 Features

* Fast access time: 6.5/7.5/8.5 ns (153, 133, 117 MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +2.5V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled and registered addr

A67P06361 Applications

* Three separate chip enables allow wide range of options for CE control, address pipelining Internally self-timed write cycle Selectable BURST mode (Linear or Interleaved) SLEEP mode (ZZ pin) provided Available in 100 pin LQFP package 2M X 18, 1M X 36 LVTTL, Flow-through ZeBLTM SRAM General Descrip

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Datasheet Details

Part number
A67P06361
Manufacturer
AMIC Technology
File Size
269.68 KB
Datasheet
A67P06361_AMICTechnology.pdf
Description
(A67P06361 / A67P16181) Flow-through ZeBL SRAM

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A67P06361 A67P16181 Flow-through ZeBL SRAM AMIC Technology
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