A8351601 Datasheet - AMIC Technology

A8351601 Bar Code Reader

(2) Delete “the only exit from power down is a hardware reset” on page 32 Issue Date June 5, 2000 June 22, 2000 Remark Preliminary 0.2 0.3 Modify 44L QFP package outline drawing and dimensions Modify PWM function (1) Add PWM3 delay control bits D0, D1 and D2 (2) Add PWM4 output control bit PWM1..

A8351601 Features

* n 80C32 CPU core n Build in 64K byte OTP ROM n Build in 8K byte external SRAM (0000H - 1FFFH), can be disable by SFR n Fully pin compatible with standard 8051 family interface n Instruction set compatible with 8051 family n Option frequency 4.5V-5.5V:0-40MHz, 2.7V-3.3V:0-16MHz n Power saving operati

A8351601_AMICTechnology.pdf